The present invention relates generally to computer systems. More particularly, the present invention relates to hardware transactional memories in computer systems.
In computer systems, parallel or concurrent programming can be implemented in form of transactions that involve executing a set of instructions in an atomic and isolated manner. A programmer can specify a group of instructions as a transaction for execution thereof. In atomic execution, either all instructions of the transaction are executed as a single atomic block, or none are executed. For instance, in case of a transaction that includes ten instructions executing sequentially, if an error occurs at the fifth instruction and an abort condition is encountered, the first through fourth instructions which have already been executed are also aborted along with the remaining instructions. The architecture of the computer system is also restored to its original state, when the transaction is aborted. Restoring the architecture of the computer system involves restoring contents of all registers and memory blocks used during the execution of the transaction.
Transactional execution helps in managing shared memory access of transactional memories in a parallel programming environment. Transactional execution can be implemented in two ways—by using a hardware transactional memory (HTM) and by using a software transactional memory (STM). HTM is implemented in the processor hardware and a transaction using HTM is committed to a system memory only after the transaction is completed. STM is implemented in software and intermediate results generated during the execution of the transaction, along with the final results of the transaction are stored in the system memory, before the transaction is committed. Once the transaction is executed, the results of the transaction that are already stored in the system memory are marked as committed. HTM transactions are increasingly being used because of quicker turnaround times and fewer storage requirements.
In case of a computer system executing a transaction using HTM, if the transaction aborts due to an error in one instruction, detecting the source of the error is important to debug the transaction. In HTM, the transaction is committed only after the completion of the execution and therefore no intermediate values are available to analyze the source of the error. Lack of explicit information about the error and its context in the transaction makes it difficult to debug large transactions.
It would be desirable to record information about the source and cause of the error in the transaction, so that programmers can be provided with a context of the error to debug the transaction. This would be helpful to the programmers in debugging the transaction, especially in debugging large transactions. It would also be helpful to use the context of the error to generate profiling information about instructions and memory locations that cause the error. For instance, a memory location involved in a plurality of transaction failures can be spotted and the number of errors, along with the type of errors with respect to the memory location can be generated. The generated profiling information can be used to identify the cause of the plurality of errors in the memory location.
Therefore, it would be advantageous to have a system and method for recording information about the aborted transaction, which generates profiling information associated with the aborted transaction.